Reveal: A formal verification tool for verilog designs

Zaher S. Andraus; Mark H. Liffiton; Karem A. Sakallah

doi:10.1007/978-3-540-89439-1_25

Reveal: A formal verification tool for verilog designs

Zaher S. Andraus, Mark H. Liffiton, Karem A. Sakallah

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Original language	English
Title of host publication	Logic for Programming, Artificial Intelligence, and Reasoning - 15th International Conference, LPAR 2008, Proceedings
Pages	343-352
Number of pages	10
DOIs	https://doi.org/10.1007/978-3-540-89439-1_25
State	Published - 2008
Externally published	Yes
Event	15th International Conference on Logic for Programming, Artificial Intelligence, and Reasoning, LPAR 2008 - Doha, Qatar Duration: Nov 22 2008 → Nov 27 2008

Publication series

Name	Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume	5330 LNAI
ISSN (Print)	0302-9743
ISSN (Electronic)	1611-3349

Conference

Conference	15th International Conference on Logic for Programming, Artificial Intelligence, and Reasoning, LPAR 2008
Country/Territory	Qatar
City	Doha
Period	11/22/08 → 11/27/08

ASJC Scopus Subject Areas

Theoretical Computer Science
General Computer Science

Access to Document

10.1007/978-3-540-89439-1_25

Cite this

Andraus, Z. S., Liffiton, M. H., & Sakallah, K. A. (2008). Reveal: A formal verification tool for verilog designs. In Logic for Programming, Artificial Intelligence, and Reasoning - 15th International Conference, LPAR 2008, Proceedings (pp. 343-352). (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 5330 LNAI). https://doi.org/10.1007/978-3-540-89439-1_25

Reveal: A formal verification tool for verilog designs. / Andraus, Zaher S.; Liffiton, Mark H.; Sakallah, Karem A.
Logic for Programming, Artificial Intelligence, and Reasoning - 15th International Conference, LPAR 2008, Proceedings. 2008. p. 343-352 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 5330 LNAI).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Andraus, ZS, Liffiton, MH & Sakallah, KA 2008, Reveal: A formal verification tool for verilog designs. in Logic for Programming, Artificial Intelligence, and Reasoning - 15th International Conference, LPAR 2008, Proceedings. Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), vol. 5330 LNAI, pp. 343-352, 15th International Conference on Logic for Programming, Artificial Intelligence, and Reasoning, LPAR 2008, Doha, Qatar, 11/22/08. https://doi.org/10.1007/978-3-540-89439-1_25

Andraus ZS, Liffiton MH, Sakallah KA. Reveal: A formal verification tool for verilog designs. In Logic for Programming, Artificial Intelligence, and Reasoning - 15th International Conference, LPAR 2008, Proceedings. 2008. p. 343-352. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)). doi: 10.1007/978-3-540-89439-1_25

Andraus, Zaher S. ; Liffiton, Mark H. ; Sakallah, Karem A. / Reveal : A formal verification tool for verilog designs. Logic for Programming, Artificial Intelligence, and Reasoning - 15th International Conference, LPAR 2008, Proceedings. 2008. pp. 343-352 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)).

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Reveal: A formal verification tool for verilog designs

Publication series

Conference

ASJC Scopus Subject Areas

Access to Document

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Cite this